hcmos clock oscillator 5.0 volts c32xx 5x7mm smd rev.: f date: 03-06-08 model c32xx is a 1.544mhz to 106.250mhz hcmos clock oscillator operating at 5.0volts. the oscillator utilizes fundamental or high q third overtone crystal design providing very low jitter and phase noise. no sub-harmonics are present in the output signal. applications: digital video sonet/sdh/dwdm storage area networks broadband access ethernet, gigabit ethernet 5x7mm smd
hcmos clock oscillator 5.0 volts c32xx 5x7mm smd rev.: f date: 03-06-08 frequency range: 1.544 to 106.250mhz frequency stability options(ppm): 10, 20, 25, 50, 100 temperature range: (standard) 0c to +70c (option m) -20c to +70c (option e) -40c to +85c storage: -55c to 120c input voltage: 5.0v 0.5v input current: 60ma max output: hcmos/ttl symmetry: 40/60% max @ 50%vdd (option) 45/55% max @ 50% vdd rise/fall time: 6nsec max @ 20% to 80% vdd logic: 0= 10% vdd max 1= 90% vdd min. disable time 200nsec max start-up time 1msec typ., 2msec max load: 50pf/10ttl max jitter rms: 12khz~20mhz 0.5psec typ., 1psec max sub-harmonics: none aging: <3ppm 1st/yr, <1ppm every year thereafter part number guide symmetry 40/60% part number stability c*3290 100ppm c*3292 50ppm c*3291 25ppm c*3298 20ppm c3297 10ppm symmetry 45/55% part number stability c*3990 100ppm c*3992 50ppm c*3991 25ppm c*3998 20ppm c3997 10ppm example:c3292-44.736mhz intermediate temp: cm3292-44.736mhz extended temp: ce3292-44.736mhz c = 0c to 70c *cm = -20c to 70c *ce = -40c to 85c
hcmos clock oscillator 5.0 volts c32xx 5x7mm smd rev.: f date: 03-06-08 recommended reflow soldering profile 217c 200c 260c 150c 90 secs. max. temperature ramp-up 3c/sec max. preheat 180 secs. max. 8 minutes max. 260c for 10 secs. max. critical temperature zone ramp-down 6c/sec. note: reflow profile with 240c peak also acceptable. 0.045 0.008 (1.14 0.20) 0.055 typ. (1.40 typ.) 0.200 0.005 (5.08 0.13) #1 #3 #2 #4 0.283 (7.20) 0.204 (5.02) p/n xxx frequency xx denotes pad 1 xxx=date code xx=lot code 0.075 (1.80) pad connection 1 enable/disable 2 gnd 3 out 4 vcc suggested pad layout 0.071 sq (1.80) 0.165 (4.19) 0.200 (5.08) 0.01uf bypass capacitor recommended mil-std-883, method 2002, condition b mil-std-883, method 2003 mil-std-883, method 2007, condition a mil-std-202, method 215 mil-std-202, method 210, condition i or j mil-std-883, method 1011, condition a mil-std-883, method 1004 tri-state function pin #1 state output state open or n/c active 1 level 0.7*vcc min active 0level 0.3*vcc max high z pwr supply ma m vm osc. pin 1 pin 4 pin 2 pin 3 bypass cap. o/p load incl probe cl out high impedance gnd or "low" oscillation open or "high" gnd out vdd
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